In recent years there has been an increased requirement for high lead count interconnect devices, especially for high density electrical components such as integrated circuits, multichip modules, etc. In recent years the packaging of integrated circuits (ICs) has evolved from conventional devices such as the dual in-line package (DIP) to a variety of devices such as surface mounted ICs. This evolution has led to the need for interconnect devices to connect the ICs to other circuitry. Various devices have been proposed and used to effect such interconnection, such as wire bonding and tape automated bonding (TAB) products.
As this field of technology has developed, the requirements for the number of leads to connect the IC to external circuitry have increased. That is, there are growing requirements for interconnect devices that are sometimes referred to as high lead count devices. There is a need in the art for high lead count in the range of 300 or more. As the lead count increases, the requirements for the interconnect device become more difficult. For a given size IC device, higher lead counts mean that the interconnect device must have finer lead widths, finer spacing between leads and better control of line width. There is a need in the art for three or even two mil pitch, i.e. 11/2 or 1 mil line width and 11/2 or 1 mil spacing, respectively. The prior art is not capable of producing commercially attainable product having such lead count and pitch. Also, since the inner leads of the device (i.e., the leads to be connected to the IC device) are supported in a cantilever manner prior to connection to the IC device, a high lead count imposes increased requirements for maintaining the center to center spacing between the leads, maintaining registration with the desired points of contact on the IC and maintaining lead planarity. Many high lead count ICs have requirements for interconnect devices with impedance control to reduce mismatched impedance of signal lines. In addition, with fine pitch of leads, signal crosstalk also becomes a problem. Similarly, there are requirements for high lead count interconnection devices for other electronic components, such as high density multichip modules, to interconnect the electronic components to other circuit components such as a printed circuit board. Such high lead count interconnect devices may have problems and requirements similar to those discussed above.
There is also a recognized need in such interconnect devices to have power and ground planes whereby power and ground voltages can be connected to various signal leads as desired. My prior application Ser. No. 352,112 discloses a two layer interconnect device having signal leads in one layer and a voltage plane (which is either a ground or power plane) in another layer. The ground or power layer is connected to selected leads in the lead layer by vias to supply either ground or power voltage to selected leads in the lead layer. It has been recognized that it would be highly desireable to have an interconnect device with three conductive layers (a lead layer and two voltage planes) so that both power and ground could be connected to selected leads in the lead layer. However, while the need for such a three conductive layer interconnect device has been recognized, that device has not heretofore been available because it has not been known how to make the device.